Testing a semiconductor devices has been proven to be crucial to ensure the efficient manufacturing of the semiconductor devices. Testing semiconductor devices before these semiconductor devices are individually cut and mounted in semiconductor device packages, such as an integrated circuit (IC) packaging, has shown even more advantages of saving additional cost and time for further processing the semiconductor devices or cutting and mounting these devices in semiconductor device packages.
Probe cards or similar testing devices are frequently used in testing the semiconductor devices under test. A probe card constitutes an interface between the semiconductor device under test and the testing equipment such as a metrology tool. One of the functions of a probe card is to provide electrical connectivity between the numerous bond pads and the corresponding electrical contacts of a printed circuit board (PCB), which may be external or internal to the probe card, to transmit and receive signals for testing of the semiconductor device under test.
Due to the different design and/or manufacturing requirements, the pitch or spacing between one bond pad and an adjacent bond pad is quite different from that between one electrical contact and an adjacent electrical contact on the printed circuit board. For example, in modern semiconductor devices, a typical pitch for the bond pads may be 50 to 100 μm, whereas a typical pitch between one electrical contact to an adjacent contact on a printed circuit board may be 0.5 to 1.0 mm. Due to various reasons such as alignment, manufacturability, or cost effectiveness of the probe card, probe cards often comprise an interposer which acts as an interface or an interconnect among the various bond pads with a much finer pitch on the device side and a different, often coarser, pitch among various electrical contacts on the PCB side. That is, each of these probe cards comprises an interposer or at least a substrate that acts as an interposer to interface between the semiconductor device under test and the PCB so as to ensure the proper test signals are transmitted and received from the corresponding bond pads on the semiconductor device under test.
Semiconductor devices usually exhibit a thin layer of thin oxides on the outer surfaces of some metal components due to, for example, exposure to non-inert gases such as air or other reactive gases or due to some passivation processes. The formation of such a thin layer of oxides may negatively affect the connectivity between the semiconductor device under test and thus impedes the transmission of the test signals to and from the metrology equipment.
One school of thought in terms of probe card design or the probe design is that the probe is designed to exhibit certain later movement during overdrive such that the tip of the probe scrubs against the bond pad laterally to break up the oxide layer. It shall be noted that the distance or the action of moving or driving the probes towards the bond pads is referred to as the “overdrive”. The theory behind this school of thought is that the electrical connectivity may be improved because the oxide layer is broken up due to the scrubbing by the lateral movement of the probe tip so as to ensure better contact between the probe and its corresponding pad.
A typical approach for inducing such a scrubbing action is to secure the probe in a cantilever fashion as illustrated in FIG. 1 which illustrates an exaggerated view of a probe before and after the probe is driven to make contact with its corresponding bond pad. In FIG. 1, the probe 102 represents a testing probe before it is driven to make contact with the bond pad 106. The probe 102 is fixedly secured on one end at the upper right hand corner and acts like a cantilever when the probe is subject to a force and may deflect upwards and downwards in the Y-direction (the vertical direction.) The probe tip 112 is free to move and is responsible for making contact with the bond pad 106. After the probe is driven by the overdrive 110 to make contact with the bond pad 106, the probe deflects as shown by 104. It can be seen that probe 104 then exhibits some lateral movement as illustrated by 108 and such a lateral movement causes the probe tip 112 to scrub against the surface of the bond pad 106.
This approach, however, causes undesired particle issues because the probe tips break the oxide layer near the semiconductor devices, where the broken oxides may end up on the semiconductor devices. These particle issues are even more severe when the testing is conducted on uncut and unmounted semiconductor devices because the broken oxides are on the device side of the wafer. In addition, there may exist further issues with the alignment between a probe and its corresponding bond pad due to the lateral motion of the probe tip. In other words, such an intended lateral motion of the probe tip further exacerbates the alignment issues, especially for semiconductor devices with high density bond pads.
Furthermore, modern semiconductor devices with high density bond pads further introduces another category of issues and challenges to testing devices such as probe cards described above. With the continual shrinkage of feature sizes and die sizes, the pitch of the bond pads has become smaller, and thus the spacing of the probes and interconnects between the probes and the PCB have also become smaller as a result. The ever decreasing spacing and pitch cause new challenges to properly insulate various interconnects, probes, or electrical contacts and/or to prevent cross-talk among nearby interconnects, probes, or electrical contacts. Probe card designs have been adapted to utilize components, such as the probes, of smaller sizes in order to accommodate this ever decreasing feature size in modern semiconductor devices. Nonetheless, the use of smaller size components has created new challenges in manufacturability of the probe cards and their internal modules and also in the reliability and robustness of the probe cards due to their small size components.
With the continued trend to shrink the feature size and the die size and the never ending push for higher operating frequencies and lower manufacturing costs, modern semiconductor device designers and manufacturers have been trying to reduce the size of the features so as to squeeze more features into a single, yet smaller die in order to produce more chips per wafer. For example, a 50 μm interconnect may be considered “small” a few years ago, but the pitch between two bond pads may be a mere 50 μm or less in some modern integrated circuits. Therefore, it is not uncommon for a modern integrated circuit chip to have thousands, tens of thousands, or even more bond pads in one chip. This continual shrinkage in feature sizes has made the design and manufacturing of the probe cards even more challenging, especially for the probe cards with interposers. FIG. 2 illustrates a typical interposer which comprises a substrate 204 and situates between a PCB 202 and a plurality of probes 208. The probe 208 makes electrical contact with the interposer at 210, and the interposer is electrically or operatively connected to the PCB 202 at 212.
In addition, modern testing devices such as the probe cards described above use multiple segments for the probe design. FIG. 10 illustrates a typical multi-segment probe design in which the ends 1002 and 1004 of the probe are made of smaller size components or materials than the main body of the probe 1006. The ends 1002 and 1004 are then bonded or connected to the main body 306 to form the probe. In other multi-segment probe designs, the ends of the probe may be made of larger size components or materials as a design choice.